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yosys

Can/does SigMap produce canonical output?

An instance of SigMap is guaranteed to produce the same output for every connected wire in a design. But does this hold true for different instances of SigMap running in different versions of yosys across different platforms?

What about if the initial queries are done in the same order? Is there some way to cause SigMap to return the same SigBit across multiple runs on multiple versions?

Solution

  • SigMap is not guaranteed to produce a canonical output with the SigMap(module) constructor, the exact behavior of such a SigMap object depends on the iterator order for module->connections() and the exact structure of the connections array.

    You can "canonicalize" a SigMap using the following technique:

    SigMap sigmap(module);
for (auto bit : sigmap.allbits())
    if (my_canonical_cmp(sigmap(bit), bit))
        sigmap.add(bit);

    (I have added SigMap::allbits() just now. So you need to update to latest git head for this to work.)