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vhdlmicrocontrollercpu-architecture

What is the dataflow between peripherals in a microcontroller


I'm currently designing a 32bit microcontroller in VHDL. I've got my instruction set down and everything is working in simulation. As of yet, I've designed the core, the ROM and RAM interface (a seperate layer where I can interface whatever device with potential wait states depending on the device) and a simple GPIO with atomic registers. The next peripheral I want to integrate is an SPI peripheral which I've already designed.

My question however is: How do real microcontrollers link together their peripherals? Of the mainstream microcontrollers I've used (STM32, MSP430, PICs and AVRs), they all essentially have an "alternate function" mode, along with the input, output and (sometimes) analog.

Internally, are there separate links between all the peripherals and the GPIO peripheral for example, a direct link from the SPI MISO and MOSI to certain assignable GPIO pins? It seems a little illogical for peripherals to communicate with eachother over the main system bus as this would cause a very busy bus if you're doing lots of fast SPI transfers! Surely however having every peripheral directly linked to each other is a recipe for quadrillions of logic cells being used for muxes?

Thanks!


Solution

  • so you are talking about multiplexing external pins, first and foremost you want address space for each peripheral block the gpio itself, general purpose I/O bit banging/sampling I/O pins in a slow manner. the spi peripheral is a separate periperal and that block has miso, mosi, chip select, etc on the far side. now beyond that if your final implementation is pin starved as most chips are, then you add a multiplex layer beyond these two mentioned peripherals. which basically connects the external pin to either the gpio block signal or the spi block signal and that logic can have a sane default. for example if the chip boots off the spi then the spi functions want to be default, maybe the primary uart if also on multiplexed pins may want to be default. but other than specific cases like that gpio is generally the default.

    basically you are talking about multiplexing your external pins to internal signals in order to reduce pin count. If you have plenty of pins then you dont need to do this. for the most part design your blocks in isolation and the multiplexer is a separate block.