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c++intelprocessorhpcxeon-phi

Intel instruction set extension and user machine (AVX, IMCI...)


If a program is compiled on a Xeon-Phi coprocessor, and contains instructions from IMCI instruction set extension, is it possible to run it on a user machine with no Xeon-Phi coprocessor ?

If it is possible, will the performance be improved on the user machine, compared to same application with no IMCI instructions compiled for instance on a i7 Core processor ?

In other words, to benefit from increased performance when using Intel instruction set extension, is it necessary that the user machine has a processor which is supporting this extension ?


Solution

  • If a program is compiled on a Xeon-Phi coprocessor, and contains instructions from IMCI instruction set extension, is it possible to run it on a user machine with no Xeon-Phi coprocessor ?

    If your program use IMCI you need a processor (or coprocessor, this is relative) that support that instructions.
    This is true for every instruction you use.

    Actually I'm aware of only Intel Xeon Phi coprocessors that support IMCI, so the answer is No.

    If it is possible, will the performance be improved on the user machine, compared to same application with no IMCI instructions compiled for instance on a i7 Core processor ?

    In other words, to benefit from increased performance when using Intel instruction set extension, is it necessary that the user machine has a processor which is supporting this extension ?

    I'm not sure what you are asking here, you can't use an instruction set extension not supported by the target processor, this is obvious as it is that you cannot speak russian with someone who can't understand russian.

    If you try using unsupported instructions the processor will raise a #UD exception signaling a not recognized instruction, the program state could not advance as you cannot skip instructions in the program flow and the application will be forced to stop.

    The KNL microarch of the Xeon Phi will support AVX512 which is also supported by "mainstream" CPU.

    This question may be useful: Are there SIMD(SSE / AVX) instructions in the x86-compatible accelerators Intel Xeon Phi?

    Also note that you should see Xeon Phi (as it is now) as a coprocessor compatible with the IA32e architecture rather than as member of IA32e family.