This is a question based on Direct Mapped Cache so I am assuming that it's ok to ask here as well.
Here is the problem I am working on:
The Problem: " A high speed workstation has 64 bit words and 64 bit addresses with address resolution at the byte level. Assuming a direct mapped cache with 8192 64 byte lines, how many bits are in each of the following address fields for the cache? 1) byte 2) Index 3) Tag?"
First I defined the terms in this problem and used the other Stack Overflow Direct Mapped Cache question and my other question on Caching as references(Please correct me if any of my definitions are wrong)
Now working off Direct Mapped Cache as a reference
Now heres the part of where I am stuck. The other post said "All the other bits are TAG bits." while this lecture post said "Each line has a tag that indicates the address in M from which the line has been copied". I am guessing that M means the RAM.
So here, all the other bits would be 64 - 6 - 10 = 48 bits. But wouldn't you need all 64 bits in the TAG to indicate what memory location in the RAM the data in the cache came from? Can someone clarify the confusion I have here?
After watching this Caching Video, I was able to figure this out. (Highly recommend this video)
Please correct me if any of this is wrong
In total the address has 64 bits. Now for the different components of the cache address