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vhdlfpga

How to correctly storage registers in an FPGA


I need to write in VHDL a program that initialize a sensor registers using i2c. My problem is to write an efficent program that don't waste all FPGA space. The number of registers I need to storage are 400 register composed by 8bit address and 8 bit data.

Program I write is:

entity i2cReg is
    port (
            RegSel : in std_logic;
            Address : out std_logic_vector (15 downto 0);
            Data : out std_logic_vector (7 downto 0);
            RegStop : out std_logic;
            ModuleEN : in std_logic
    );
end i2cReg;

architecture i2cReg_archi of i2cReg is
    signal counter :integer := 0;

    begin
        process(RegSel, ModuleEN)
        begin
            if ModuleEN = '0' then
                    Address <= x"10";  
                    Data <= x"10";
                    RegStop <= '0';
                    counter <= 0;
            elsif rising_edge(RegSel) then
                counter <= counter + 1;
                case counter is
                    when 0 =>
                     Address <= x"10";
                     Data <= x"10";
                    when 1 =>
                     Address <= x"10";
                     Data <= x"10";
                    when 2 =>
                     Address <= x"10";
                     Data <= x"10";
                    when 3 =>
                     Address <= x"10";
                     Data <= x"10";
                    when 4 =>
                     Address <= x"10";
                     Data <= x"10";
                    when 5 =>
                     Address <= x"10";
                     Data <= x"10";
                    when 400 =>
                        RegStop <= '1';
                    when others =>
                end case;
            end if;
        end process;

end i2cReg_archi;

There is a way to optimize this code? Or you advice me to use an external eeprom?


Solution

  • Yaro - you have not mentioned the FPGA vendor or the device but the answer is: Yes, you can initialize ROM in an FPGA so that the values you need are present after configuration. Both Altera and Xilinx allow you to provide a file with the initial values during synthesis.

    Kevin.