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If statement using vhdl

I am designing counter using vhdl using planahead software, anyway I am using if statment but it gave many errors . the purpose of the counter is to count Ascending/Descending from 1 to 10 and the opposite. In case of Ascending I reset the out when it get to 9 to count again from 0. And in case Descending reset the out when it gets 0 and give 9 as new value . and I am using switch button on the board to switch between Ascending/Descending counting. Below the if statment and the errors . I dont know if I use it on the write form . Plz if anyone have an idea would be perfect.

 Line:27-   if(inc_dec='1') then
 Line:28    if (r_reg=M-1) then
            r_next<=(others=>'0')
 Line:30    else r_reg+1;
 Line: 31   elsif (inc_dec='0')then
 Line:32    if (r_reg=M-10) then
            r_next<=(others=>'9')
 Line:34    else
            r_reg-1;

           end if;
           end if;
           end if;

The errors :

 Line:27 [HDLCompiler 806] Syntax error near "if". 
 Line:28[HDLCompiler 806] Syntax error near "then". 
 Line:30[HDLCompiler 806] Syntax error near "else". 
 Line:31[HDLCompiler 806] Syntax error near "then". 

 Line:32[HDLCompiler 806] Syntax error near "then". 
 Line:34[HDLCompiler 806] Syntax error near "else".
Solution

  • As pointed out by Morten Zilmer, you need to terminate the if/else with an end if. Also there have been some missing semicolons. The code below should work. 

    if (inc_dec='1') then
   if (r_reg=(M-1)) then
        r_next <= (others=>'0');
   else 
        r_reg+1;
   end if; 
elsif (inc_dec='0') then
   if (r_reg=(M-10)) then
        r_next <=  to_unsigned(9, r_next'length);
   else
        r_reg-1;
   end if;
end if;

    Update: Jonathan Drolet is right. Changed

    r_next <= (others=>'9');

    to

    r_next <=  to_unsigned(9, r_next'length)

    in the code