here's part of my Verilog code:
reg [5:0] channel[0:7];
reg [5:0] tmp[0:7];
reg [2:0] counter_out;
reg [2:0] scounter_samp;
reg [2:0] scounter_bits;
...
always @(posedge clk, posedge rst) begin
if(rst) begin
done <= 1'b0;
counter_out <= 7;
scounter_samp <= 0;
scounter_bits <= 0;
tmp[0] <= 6'b0;
tmp[1] <= 6'b0;
...
channel[0] <= 6'b0;
...
end
else begin
...
if(done==1'b1) begin
data_out <= channel[counter_out];
counter_out <= counter_out-1;
if(counter_out==0) begin
done <= 1'b0;
counter_out <= 7;
end
end
tmp[scounter_samp][scounter_bits] <= !input_data[8];
scounter_samp <= scounter_samp + 1;
if(scounter_samp==7) begin
scounter_samp <= 0;
scounter_bits <= scounter_bits + 1;
if(scounter_bits==5) begin
done <= 1'b1;
scounter_bits <= 0;
channel[0] <= {tmp[0][5:1],!input_data[8]};
channel[1] <= tmp[1];
channel[2] <= tmp[2];
channel[3] <= tmp[3];
channel[4] <= tmp[4];
channel[5] <= tmp[5];
channel[6] <= tmp[6];
channel[7] <= tmp[7];
end
end
...
end
And here's my problem with it: When I run it in Xilinx ISE 13.1 in behavioral simulation it works perfectly fine but in post-translate simulation ISE generates warnings:
WARNING:Xst:1710 - FF/Latch <channel_0_1> (without init value) has a constant value of 0 in block <adc_ctr>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <channel_0_2> (without init value) has a constant value of 0 in block <adc_ctr>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <channel_0_3> (without init value) has a constant value of 0 in block <adc_ctr>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <channel_0_4> (without init value) has a constant value of 0 in block <adc_ctr>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <channel_0_5> (without init value) has a constant value of 0 in block <adc_ctr>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <channel_1_0> (without init value) has a constant value of 0 in block <adc_ctr>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <channel_1_1> (without init value) has a constant value of 0 in block <adc_ctr>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <channel_1_2> (without init value) has a constant value of 0 in block <adc_ctr>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <channel_1_3> (without init value) has a constant value of 0 in block <adc_ctr>. This FF/Latch will be trimmed during the optimization process.
...
WARNING:Xst:2404 - FFs/Latches <channel_0<5:1>> (without init value) have a constant value of 0 in block <adc_ctr>.
WARNING:Xst:2404 - FFs/Latches <channel_1<5:0>> (without init value) have a constant value of 0 in block <adc_ctr>.
And because of these trimmings output data is zero for all channels but channel[0][0]. Input data changes constantly so channel shouldn't be constant and shouldn't be trimmed. Can someone please explain to me what is wrong with this code?
Using (* KEEP = "TRUE" *) and (* KEEP_HIERARCHY = "TRUE" *) doesn't work.
Replacing
tmp[scounter_samp][scounter_bits] <= !input_data[8];
with
case(scounter_samp)
0: tmp[0][scounter_bits] <= !input_data[8];
1: tmp[1][scounter_bits] <= !input_data[8];
2: tmp[2][scounter_bits] <= !input_data[8];
3: tmp[3][scounter_bits] <= !input_data[8];
4: tmp[4][scounter_bits] <= !input_data[8];
5: tmp[5][scounter_bits] <= !input_data[8];
6: tmp[6][scounter_bits] <= !input_data[8];
7: tmp[7][scounter_bits] <= !input_data[8];
endcase
solved the problem but I have no idea why.