Search code examples
vhdlmips

Cannot resolve slice name as type std.standard.integer


following code is a simple instruction Memory in Mips CPU

LIBRARY ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;

ENTITY instructionMemory IS
   generic (delay :time :=10 ns);
  PORT( a : INOUT STD_LOGIC_VECTOR ( 31 downto 0);
      output: OUT STD_LOGIC_VECTOR( 31 downto 0)
      );
END ENTITY;
ARCHITECTURE instructionMemory OF instructionMemory IS
  type MemMatrix is array ( 0 to 7 ) of std_logic_vector(31 downto 0); -- instruction from memory
  signal Mem:MemMatrix := (x"00000000",x"00000001",x"00000000",x"00000001",x"00000001",x"00000001",x"00000001",x"00000001");

  BEGIN
     output <= Mem(conv_integer(a(6 downto 2)));             
END instructionMemory;

I assume Mem is Memory and initilized it with some value. I wanna read this data and assign it to output.

But it's gives me following error :

no feasible entries for subprogram conv_integer  

I change error line to this :

Mem(a(6 downto 2));

But again it gives me another error:

cannot resolve slice name to type std.standard.integer

I have no idea how to solve this, Can any body help me ?


Solution

  • The following analyzes and elaborates:

    library ieee;
    use ieee.std_logic_1164.all;
    use ieee.std_logic_arith.all;
    use ieee.std_logic_unsigned.all;
    
    entity instructionmemory is
       generic (delay :time :=10 ns);
      port( a : inout std_logic_vector ( 31 downto 0);
          output: out std_logic_vector( 31 downto 0)
          );
    end entity;
    architecture instructionmemory of instructionmemory is
      type memmatrix is array ( 0 to 7 ) of std_logic_vector(31 downto 0); -- instruction from memory
      signal mem:memmatrix := ( 
          x"00000000",x"00000001",x"00000000",x"00000001",
          x"00000001",x"00000001",x"00000001",x"00000001"
          );
    
      begin
         output <= mem(conv_integer(a(6 downto 2))); -- closing paren for mem();
    end instructionmemory;
    

    What's different about it is the addition of a matching closing paren in the concurrent signal assignment statement targeting output.

    ghdl actually pointed to the character location of the problem with a less than helpful message.

    instructionMemory.vhdl:20:47: ',' is expected instead of ';'

    The assumption being without a closing paren an additional argument is expected. Your error message(s) likely indicates a YACC/Bison based parser without the ability to provide error messages on non-terminals.

    Addendum

    If you were to note Russell's comment there is an integer range mismatch between the conversion of 6 downto 0 and memmatrix (0 to 7). The conversion has a binary range of 2**5 while mem has a range of 0 to 7. Should a(6 downto 2) every be out of range 0 to 7 a run time error will occur. Use of an integer type would allow to modify or otherwise handle an a field out of range by checking the integer value against the bound of mem.

    You could also increase memmatrix size to accomidate the full range of a(6 downto 2).

    Your additional question on how to assign a different index to mem for assigning output requires a bit more context. Where do you want want to get the index from?