I designed a circuit using RTL SystemC library. This circuit works fine and I can simulate it properly. Now I want to deploy it into an FPGA and I'm looking for a way to convert my SystemC code into VHDL or Verilog in order to use it in Xilinx ISE.
Is there a way to do that ? Or do O have to do all the programming again but this time, in VHDL ?
Probably yes, you have to clone the existing design in VHDL - certainly, if you must use ISE. But it might be worth looking at Vivado first.
However, assuming your simulator understands VHDL as well as SystemC, this will be straightforward because you can drop the VHDL into the existing testbenches and verify its correct function, thereby reusing at least half of your proglamming so far.
And presumably you can use the SystemC version as an accurate specification; translating this into VHDL should be quite a straightforward process.