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verilog

What does always block @(*) means?

If I write the following code:

module POLY(CLK,RESET_n,IN_VALID,IN,OUT_VALID,OUT);

input         CLK,RESET_n,IN_VALID;
input  [ 3:0] IN;
output        OUT_VALID;
output [12:0] OUT;

and then use it:

always @(*)
begin
.........
end

  1. Does it mean that the input CLK,RESET_n,IN_VALID;input [ 3:0] IN; will trigger the always block or only the input that has used in the block will trigger the always block?

  2. But it doesn't write posedge or negedge, so the two both edge will trigger the always block or not?

Solution

  • The (*) means "build the sensitivity list for me".

    For example, if you had a statement a = b + c; then you'd want a to change every time either b or c changes. In other words, a is "sensitive" to b & c. So to set this up:

    always @( b or c ) begin
    a = b + c;
end

    But imagine you had a large always block that was sensitive to loads of signals. Writing the sensitivity list would take ages. In fact, if you accidentally leave a signal out, the behaviour might change too! So (*) is a shorthand to solve these problems.