Does SPARC v9 have a double word compare and swap instruction?

Question

So; on a 64 bit SPARC CPU which is v9 compliant, there exists I know a cas instruction. This operates on single word length values.

I've also seen on the web reference to a casx instruction - but I can't find out anything much more about it.

I'm wondering - is this a double word compare and swap?

And if not, the general question is; IS there a double word compare and swap?

Answer 1

Sparc64 - alone amongst modern CPUs - implements neither double wide CAS nor LL/SC. As such, implementing lock-free code is problematic. There a solutions, but they are solutions to a problem (ABA) which does not exist on other platforms because of their support for CAS or LL/SC. Furthermore, a range of lock-free algorithms cannot be implemented on Sparce because of this limitation.