DBPSK Demodulation in Simulink using Xilinx blockset...

Unable to Implement Simple ALU...

using divider core from xilinx...

Why IEEE vhdl standard library is not STL?...

how much for Sound (ADC) reading in 24khz?...

How commonly used are the xilinx chips?...

How to define clock input in Xilinx...

code breaks when trying to run any lwip function...

Flip-Flop triggered on the edge of two signals...

Why is XST optimizing away my registers and how do I stop it?...