micro-optimization Examples and Free Source Code

4-way bytewise interleave 4x 16-byte vectors from memory, with AVX512...

x86 x86-64 micro-optimization avx512

Insert a bit in a byte at pos n with Assembly...

assembly arm micro-optimization cortex-m

Why jnz requires 2 cycles to complete in an inner loop...

x86 micro-optimization microbenchmark micro-architecture

Cycles/cost for L1 Cache hit vs. Register on x86?...

performance x86 cpu-architecture cpu-cache micro-optimization

When to use a certain calling convention...

assembly x86 x86-64 calling-convention micro-optimization

Is there a penalty when base+offset is in a different page than the base?...

performance assembly x86 micro-optimization

Why does GCC chose dword movl to copy a long shift count to CL?...

assembly gcc x86-64 micro-optimization

Is there any performance difference in using int versus int8_t...

c types micro-optimization

Does cmpxchg write destination cache line on failure? If not, is it better than xchg for spinlock?...

assembly x86 cpu-cache micro-optimization compare-and-swap

What is the optimal way for reading the contents of a webpage into a string in Java?...

java string optimization inputstream micro-optimization

Why this unnecessary MOVAPD copy in gcc 9.1, in a tiny function...

assembly gcc x86-64 sse micro-optimization

In x86-64 asm: is there a way of optimising two adjacent 32-bit stores / writes to memory if the sou...

assembly optimization x86-64 micro-optimization

Instructions to copy the low byte from an int to a char: Simpler to just do a byte load?...

c assembly x86-64 micro-optimization instructions

Can this MIPS assembly code be simplified?...

string assembly mips micro-optimization simplify

Avoiding AVX-SSE (VEX) Transition Penalties...

assembly x86 sse avx micro-optimization

Is movzbl followed by testl faster than testb?...

performance assembly x86 x86-64 micro-optimization

An implementation of std::atomic_thread_fence(std::memory_order_seq_cst) on x86 without extra perfor...

c++x86 inline-assembly micro-optimization memory-barriers

What is the fastest way to swap the bytes of an unaligned 64 bit value in memory?...

performance assembly x86-64 endianness micro-optimization

Should combining memory fence for mutex acquire-exchange loop (or queue acquire-load loop) be done o...

arm cpu-architecture micro-optimization memory-barriers

How to instruct MS Visual C++ compiler to use an uninitialized __m512i register...

c++visual-c++intrinsics micro-optimization avx512

Do java finals help the compiler create more efficient bytecode?...

java optimization micro-optimization

How can one figure out if a loop is being entered with a 16 byte aligned address in x86-64 assembly?...

assembly optimization x86-64 memory-alignment micro-optimization

fastest way to negate a number...

c++visual-c++x86 micro-optimization visual-c++-2012

repz ret: why all the hassle?...

assembly x86 micro-optimization amd-processor branch-prediction

What does `rep ret` mean?...

assembly x86 micro-optimization branch-prediction

Is calling `add` on a memory location faster than calling it on a register and then moving the value...

assembly x86 x86-64 micro-optimization

Fast method to copy memory with translation - ARGB to BGR...

c x86 rgb sse micro-optimization

Impact on performance when having multiple returns...

assembly x86 micro-optimization

80286: Which is the fastest way to multiply by 10?...

assembly x86-16 micro-optimization

What do multiple values or ranges means as the latency for a single instruction?...

performance assembly x86 cpu-architecture micro-optimization