What's the motivation for a fpu to implement their registers in stack-based fashion?

What's the motivation for a fpu to implement their registers in stack-based fashion? To my understanding other instructions-sets such as x86/sse use named registers. I can imagine the stack-based properties correspond with our thought of functions in general thus resulting in a more intuitive design for assembly programmers.

However I was curious whether or not there are some more tangible motivations i.e. technological advantages.

Solution

These architectures are not commonly seen in the field today, anymore. Back in the days though, both silicon space for registers and program code space were rare resources (as it is still the case in embedded environments nowadays). That pretty much sums up the two motivations behind such an architecture:

ISA is much slimmer
- less space for register coding is needed
- less instructions for things like stack handling (obviously)
simpler hardware designs
- less register decode logic
- very deterministic and mathematically well-understood behavior (the reason why virtual architectures like the Java Virtual Machine still use it)