How do the bank switching in PIC assembler?

I'm getting confused by bank switching in PIC assembler... This works for putting a 'Q' on the usart:

bsf PORTB,1         ;Set Transmit DIR (PORTB (0x6) not mirrored in other banks)
movlw 'Q'           ;'Q' to work reg
movwf TXREG         ;work reg to TXREG (TXREG (0x19) not mirrored in other banks)
clrwdt              ;Clear watchdog
btfss TXSTA,TRMT    ;Wait until 'Q' is shifted (TXSTA is 0x18, not mirrored)
goto $-2
bcf PORTB,1         ;Set Recive DIR

And this works just as good:

BCF 0x3, 0x5        ;Switch to bank 0
BCF 0x3, 0x6
bsf PORTB,1         ;Set Transmit DIR
movlw 'Q'           ;'Q' to work reg
movwf TXREG         ;work reg to TXREG 
BSF 0x3, 0x5        ;Switch to bank 1
clrwdt              ;Clear watchdog
btfss TXSTA,TRMT    ;Wait until 'Q' is shifted
goto $-2
BCF 0x3, 0x5        ;Switch to bank 0
bcf PORTB,1         ;Set Recive DIR

I have checked that the compiler does not do any bank switching when I'm not watching... When do HAVE to switch bank?

Solution

First off which pic device are you using because that does make a slight difference. Also which compiler are you using.

However the reason your code works is because everything you need to do to tx to the uart is in bank 0. Your writes to port b are doing nothing I am guessing that you want to switch the trisb and that is in bank 1 but since the uart has control of the pins writing to port B it self has no effect. In your second example you are polling what you think is TXSTA but that is in bank 0 not bank 1. I am guessing that you get lucky by polling wrong location and the bit is always in the correct state so the loop terminates.

When I do a transmit I prefer to first see if the uart is empty and wait until it is and then send the char. No need to wait for it to finish transmitting unless you want to use an interupt for example to get the next char.

So both pieces of code work because you are in bank 0 in both when you do movwf TXREG. The rest is handled in hardware for you.

Edit: Now that I know the part you are correct in that TXSTA is in bank 1. You through me because you had a comment of the address as 0x18 and it should be 0x98. In the first example you are polling RCSTA bit 1 which is the OERR not TXSTA. So if it is working this implies that OERR=1 which is very possible I usually clear it when I do anything with the receive.