How to disable hardware prefetchers in Mac OS on Apple M1?

Question

In Linux (or macOS) on Intel, we can disable prefetching by modifying the 0xa14 register using wrmsr.

I read that on ARM Cortex-A53, the L1PCTL part of CPUACTLR_EL1 register can be set to 0 to disable the L1 prefetcher.

Will changing L1PCTL part of CPUACTLR_EL1 register work on M1 too?
How do I disable prefetching in Apple M1?

Answer 1

Will changing L1PCTL part of CPUACTLR_EL1 register work on M1 too?

No. M1 uses Firestorm and Icestorm cores by Apple, not Cortex-A53 by ARM. They don't have this register.

How do I disable prefetching in Apple M1?

Apple has previously published sources that included the following definitions:

#define ARM64_REG_HID5          s3_0_c15_c5_0
#define ARM64_REG_HID5_DisHwpLd (1<<44)
#define ARM64_REG_HID5_DisHwpSt (1<<45)

That disables L2 hardware prefetches for loads (bit 44) and stores (bit 45). I'm not aware of anything to control this at the L1 level, but there may still be bits for that in one of the many undocumented system registers.