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stm32i2chal

STM32L031 missing I2C clock cycles

I am trying to test some I2C commands on STM32L031 Nucleo board: https://www.st.com/resource/en/user_manual/um1956-stm32-nucleo32-boards-mb1180-stmicroelectronics.pdf

I have written a few I2C drivers for the STM32 microcontrollers and never came across such a strange issue with the I2C.

I have configured the I2C with the default settings: enter image description here

And have connected Logic analyzer to SCL and SDA pins.

In my code, I am simply trying to write to I2C using the following code:

  uint8_t test_data[1] = {0xAA};
  uint16_t device_address = 0xff;
  HAL_I2C_Master_Transmit(&hi2c1, device_address, &test_data, 1, 0xff);

The result is: enter image description here

I cannot fully wrap my head around the result. I would have expected to see 2 bytes being sent over the I2C bus:

1st byte: Address (0xff)

2nd byte: Data (0xAA)

I also expect to see 16 clock cycles on the SCL line since I am sending 2 bytes.

As you can see from the logic analyzer graph, it seems to be missing clock cycles hence not able to send the full data. Have anyone experienced such strange I2C issues? I appreciate any help

UPDATE

I have connected SHT40 I2C temperature and humidity sensor my STM32 Nucleo board and tried to check if the address 0x44 (SHT40 address) is detected:

#define SHT40_ADDRESS 0x44

    HAL_StatusTypeDef ret = HAL_I2C_IsDeviceReady(&hi2c1, SHT40_ADDRESS, 10, 100);
      if(ret == HAL_OK)
      {
          printf("I2C device detected at address 0x44 \n");
      }
      else{
          printf("SH40 not detected \n");
      }

The result: enter image description here

Does it seem correct? Im not sure why it writes 0x22, according to me that should be 0x44: enter image description here

Solution

  • There's a NAK after address, so there's no active slave on the bus with this address to which the data could be sent. I don't use Cube/HAL, but it probably returns some error at that point.

    JW

    PS. 1111 1XX is a reserved address according to I2C specification chapter 3.1.12 Reserved addresses, so there should be no slave with address of 0xFF. Also, addresses are 7-bit.