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embeddedstm32f4discovery

what is program alignment error flag (PGAERR) in stm32f407?

I am trying to implement my own drivers for stm32f407 from bare-metal, my problem is that I don't understand what the term program alignment error flag (PGAERR) means, as in page 87 from Embedded Flash Memory Section, it says:

It is not allowed to program data to the Flash memory that would cross the 128-bit row boundary. In such a case, the write operation is not performed and a program alignment error flag (PGAERR) is set in the FLASH_SR register.

I tried to look for any other definitions from the reference manual, so I look into bit definitions of registers and I found:

enter image description here

from my understanding, it means we can't write more than 128-bit at the same time to flash memory but at the same time, there is no data type greater than 64-bit in C as in uint64_t so I assume my assumption is wrong, so is there any example cases that can illustrate when will this error flag be 1?

Solution

  • Split the memory into 128-bit chunks (in your mind). If you perform a 64-bit write, you can't have half of it in one 128-bit chunk, and another half (or part) of it in another 128-bit chunk. The entire piece of data must be entirely in one 128-bit chunk.

    |______________ 128-bit ___________ || ___________ 128-bit _____________ ||
| 32-bit | 32-bit | 32-bit | 32-bit || 32-bit | 32-bit | 32-bit | 32-bit ||
↑                          ↑
Writing 64-bit here is ok  Writing 64-bit here is >not< ok