I'm writing a beaglebone driver and for this I need two modules: gpio_module and BBG_module which are related to EXPORT_SYMBOL. In gpio_module.c I wrote
uint8_t GPIO_device(void)
{}
EXPORT_SYMBOL(GPIO_device);
and in BBG_module.c
extern uint8_t GPIO_device(void);
GPIO_device();
added to makefile
obj-m := gpio-module.o BBG_module.o
ARCH=arm
CROSS_COMPILE=arm-linux-gnueabi-
KERNELDIR=/usr/src/kernels/linux-4.9.82-ti-r102
arm_modules:
$(MAKE) ARCH=$(ARCH) CROSS_COMPILE=$(CROSS_COMPILE) -C $(KERNELDIR) M=$(shell pwd) modules KBUILD_EXTRA_SYMBOLS=`pwd`/dep/Module.symvers
echo "bulding module for arm architecture:"
by running the make command, I got two .ko files and a Module.symvers dependency file with all EXPORT_SYMBOLs.
KBUILD_EXTRA_SYMBOLS=
pwd/dep/Module.symvers
neededI'm a beginner and would appreciate any help. Thanks in advance.
Here is an example Makefile that combines several modules into one:
obj-m := mymodule.o
mymodule-objs := gpio_module.o adc_module.o uart_module.o crc.o
ccflags-y := -I$(src)/include
gpio_module-objs := GPIO_module.o
adc_module-objs := ADC_module.o
uart_module-objs := UART_module.o
ARCH=arm
CROSS_COMPILE=arm-linux-gnueabi-
KERNELDIR=~/linux
arm_modules:
$(MAKE) ARCH=$(ARCH) CROSS_COMPILE=$(CROSS_COMPILE) -C $(KERNELDIR) M=$(shell pwd) modules
This Makefile combines several modules into a single module, mymodule.o
, while specifying which source files are needed for each module. It also includes the -I$(src)/include
flag to search for header files. Please make sure the order of the modules matches the requirements of the dependencies in your project. this despite the fact that GPIO_module.o ADC_module.o
contain EXPORT_SYMBOL
, which are used in UART_module