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assemblyriscvinstruction-encoding

Why the risc-v instruction "addi sp,sp,-32" is converted to binary code "11 01"?


I'm learning risc-v instruction set. I know that "addi sp,sp,-40" will be converted to "fd810113". But I don't know why "addi sp,sp,-32" is converted to binary code "11 01".

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Solution

  • That is using the compressed instruction format:

    C.ADDI[2:0] nzimm[5] dest[4:0] nzimm[4:0] C1[1:0]

    With C.ADDI being 000, SP being register #2 and C1 being 01 it gives:

    000 1 00010 00000 01 = 0001 0001 0000 0001 = 0x1101

    Note that the compressed instruction only takes immediate from -32 to +31 due to having 6 bits of space which is why the other instruction with -40 is using the 32 bit format.