IorD Control Signal in MIPS

Question

Why is the control signal called IorD? What does the name stand for? Couldn't find any documentation about this.

Answer 1

This particular MIPS datapath diagram shows a shared memory used for both instructions and data.

In the above design, since the memory is shared for both instructions and data, there needs to be a control that tells that mux which address to use for a memory access, whether PC (Instruction fetch) or ALUOut (Data access) — hence IorD.

An alternative (a more popular design) has separate Instruction Memory and Data Memory.  When the Instruction Memory and Data Memory are separated, there is no need for a IorD mux control signal because the Instruction Memory always sources PC for the address and the Data Memory always sources ALUOut for the address.  (MemRead and MemWrite are still necessary for the Data Memory.)  You can see this by searching for "MIPS single cycle datapath" for images.