String in VHDL Waveform

Question

How can I print a string in VHDL waveform? -> like here

Answer 1

A string is no different from other types of signals, so you can do like:

library ieee;
use ieee.std_logic_1164.all;

entity tb is
end entity;

architecture sim of tb is

  signal info : string(1 to 5);

begin

  process is
  begin
    info <= "Hello";
    wait for 1 us;
    info <= "VHDL ";
    wait for 1 us;
    info <= "world";
    wait for 1 us;
    info <= "!!!  ";
    wait for 1 us;
    wait;
  end process;

end architecture;

Simulation in Intel Quartus ModelSim Starter Edition (free) then gives: