Search code examples
caesstm32

Inconsistency between STM32H7 AES HAL and Reference Manual

I'm starting to implement AES-GCM on STM32H753 (rev V).

I've found an inconsistency between the HAL and the Ref Manual.

The STMicro HAL for AES for STM32H7x3 is setting some bits called NPBLB in CRYP_CR register if the product revision is above rev B.

But these bits are not documented in the ref manual rev 7.

Is it just an error of the HAL ?

Solution

  • It is common for the IP blocks to be shared between different STM32 families, so if you cannot find info in the reference manual of your device, it is worth looking at the documentation of other devices.

    AN5312 mentions that NPBLB bits were added in revision V, but gives no documentation about the meaning of the bits:

    RevV supports hardware management for GCM encryption or CCM decryption with the last block of payload size inferior to 128 bits. This is possible thanks to the addition of the NPBLB bit field (the highlighted cells in Figure 5) in the CRYP_CR register.

    The reference manual of STM32MP1, however, has the description of these bits, as shown below:

    CRYP_CR