I have been using the STM32l4 ( STM32l342kc nucleo-32 ) line for a few years now, in a current project that I am working on I realized that I have a constant negative ADC offset on my readings (about 52mV).
The system is running in 10bit continuous mode, with DMA transfers and hardware 8X oversampling. For some reason, the first count starts about 50mV higher than expected (the first count starts at 52mV instead of the expected 3mV). When I saturate the ADC with 3306mV the ADC registers a signal 52mV lower than the maximum count ( reads as if it is getting 3248mV ). I have confirmed with 3 external voltage measurements that the voltage I am sending in is accurate.
I have tried feeding in both buffered/un-buffered/low impedance DC signals and the result is the same. I have also played with the sampling times for the system and the results are repeatable across all the tests.
Final notes, the STM32 is running on an official dev board from ST, also I have tested different ADC channels, all measurements were made on both the breadboard and at the pin of the MCU to rule to bad connections. I have also tried without the 8x oversampling.
I was wondering if anyone had any suggestions on possible sources of the error that I may be overlooking and/or any possible solutions that I could test/implement. Thank you in advance.
The STM32L432KC Nucleo board does not come with a high precision reference. As you noted, it's merely the 3.3V LDO powering the analog regions of the device. This is likely where your error is coming from as it's a relatively cheap, inaccurate part generating that 3.3V. Calibration helps with offset and gain errors, and can lead to a more accurate measurement, but if you use the typical conversion approach from LSB to absolute value (and you're looking for that absolute value), an incorrect reference can give you that error right back. Page 517 of the family reference shows how to implement this in software.
On top of this approach, you can attempt to measure the absolute voltage of your reference through an internal reference using the process outlined on page 582 of the family reference. If you combine this approach to get a good grasp of what Vref+ is from the LDO, combined with proper calibration, you'll likely be able to reduce your offset error, as well as the slight gain error you were showing.
Resources: STM32L4 Family Reference, Best ADC Accuracy Procedures