I have a conceptual (ish) question that I can't understand. I have an assignment and it is telling me to choose which of the following 4-bit binary (2's complement) additions will result in overflow. The following are:
For A, I got 10100, for B, I got 11001, for C, I got 1111, and for D, I got 10000.
There is only one answer apparently, but A, B, and D all produce an overflow. They end up in 5-bits rather than 4-bits. When I asked the instructor if he meant to say which one of these do NOT produce an overflow but he said that the question is correct. He gave me this hint:
For 4-bit unsigned numbers, overflow means that the sum of 2 numbers can't be represented in unsigned bits. For 4-bit 2's complement, overflow is when the sum of two numbers cannot be represented in 4-bit 2's complement.
This however did not help me, because it is already my understanding - for A, B, D, the sum is unable to be represented in 4-bit 2's complement. What am I doing wrong?
You must disregard the fifth bit. We are calculating modulo 16, just with 4 bits.
So overflow happens in A.
The fifth bit is absent. It would in a processor be a something like an overflowish carry flag.
Overflow can only happen when the signs of both terms are the same: sign1 xor sign2 = 0. And the result has a different sign. In a processor one normally have a sign flag and such an overflow flag.
Logical: two negative numbers below -8, or two positive numbers above 7.