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vhdlsequential

What is the speed of a sequential statement in VHDL?


In one of my textbooks about VHDL, it states that the code in a process statement will be executed sequentially. This means that it will be executed after each other. In comparison with concurrent statements. However, I wonder with what kind of speed the code will be executed in a sequential statement. In programming, this speed is determinant by the processor's clock speed. So where is the sequential statement's speed determinant by?


Solution

  • In programming, it makes sense to track the speed of execution because a program, at bottom, is a set of instructions for a computer to complete.

    VHDL, being a hardware description language, is something else entirely. The code you write in VHDL doesn't provide instructions for an existing piece of hardware to complete. Instead, it (unsurprisingly) describes hardware. The logic you define in your code, in turn, defines the logic that is implemented in a digital circuit that itself will operate based on stimuli that are incorporated into the design.

    This is why, to reference your other question, a signal does not update immediately. A signal assignment is only a description of a relationship implemented in hardware. For that relationship to turn into an executing process, it needs some sort of physical stimulus - hence each process' sensitivity list, a description of which signals act as stimuli to which portions of implemented logic.

    So, to get to your question: a sequential statement doesn't "execute" the way a programming command does. Instead, it describes what logical operations the hardware will carry out within a given run through a process (for example, in a clocked design, this could be per clock cycle). How "fast" that happens, ideally, is determined by your description in code in tandem with the hardware's speed; depending on your design, you might try to accomplish too much within too short a time (say, again, a clock cycle) and run up against timing constraints.

    But what's important to note is that that's not execution of your code, it's movement of signals/bits through a physical circuit described by your code. What you've defined with VHDL is the hardware, not the instructions. The speed to consider is the operating speed of the hardware and the design, not the completion of the code understood as a set of instructions.