I'm learning about computer architecture and I was reading about encoders and decoders. In a MIPS processor, the opcode has 6 bits. I was wondering how many input bits are needed to build a decoder to decode opcodes? I know that a decoder is a combinational circuit that converts binary information from n input lines to a maximum of 2^n unique output lines. Knowing that the opcode is 6 bits, does that mean I need only 3 bits because 2^3 is 8 and the theoretical maximum number of outputs will be 8?
The opcode in the machine instruction word is the input to the decoding process, which may involve a digital logic circuit of the same name, a binary decoder.
There are 2^6 possible values for the 6-bit opcode field, and thus 2^6 possible different patterns of output (internal control signals) you might want to decode to.
See https://en.wikibooks.org/wiki/MIPS_Assembly/Instruction_Formats#Opcodes for an incomplete table of some common instructions. (missing xori, probably others).
https://uweb.engr.arizona.edu/~ece369/Resources/spim/MIPSReference.pdf also lists opcode details for another subset of the available MIPS opcodes. (missing bgezal and bltz for example.)
Note that all R-type instructions share the same opcode, and the func field is used to select which operation. But I-type instructions do each use different values for the opcode field, leaving enough bits left for up to 2 registers and a 16-bit immediate. There are many more than 8 unique opcode-field values that a MIPS CPU has to recognize.