VHDL - Register for Push Button

Question

I'm trying to create a simple push button in VHDL that turns on after an input switch or pb goes from 0 to 1 to 0 using a clock and a process. However, my code seems to be giving me undefined output. Here's what I have so far.

use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

Entity captureInput is port
(
    CLK          : in  std_logic := '0';
     RESET_n      : in  std_logic := '0';
     buttonState  : in  std_logic := '0';
     buttonOut    : out std_logic := '0'
);
end Entity;

   ARCHITECTURE one of captureInput is
    
    signal lastButtonState: std_logic := '0';
    signal btnState      : std_logic := '0'; 
    
BEGIN

process (CLK, RESET_n) is

begin
   if (RESET_n = '0') then
        lastButtonState <= '0';
         
    elsif (rising_edge(CLK)) then
        if (buttonState ='0' and lastButtonState = '1') then
             btnState <= '1';
    end if;
     lastButtonState <= buttonState;
    end if; 
end process;

buttonOut <= btnState

end;

Answer 1

Try to initialize your btnState in the reset branch of your register and also have an else statement where you set your btnState back to 0, under some condition. I would bet that your undefined output comes from the fact that you do not define your btnState anywhere else outside your if conditions. It's good practice to not rely on the initial value of your declaration: Synthesis tools ignore it and some simulators will as well. Also, remember that the clocked body of the if will generate a register for every signal that gets assigned a value inside it, and that signals will keep the last value assigned to them inside a process.

You are also missing the Library ieee; statement at the top and a semicolon after buttonOut <= btnState.