Assume that a computer architect has already designed 6 two address and 30 zero address instructions using the instruction length of 11 bits and size of the address field of 4 bits. The maximum number of one address instruction that can be added to the instruction set is:
With an address field of 4 bits, a 2-address opcode has 8 bits of address; thus 3 bits (11 - 2*4) to specify the opcode. Note that because the 8 address bits can have any value, one of these 3 bit opcodes must be reserved for specifying 0 or 1 address opcodes. 6 were already defined, so 2^3 - (6 + 1) is the number of available 2-address opcodes.
That leaves 8 bits to encode the zero and one address opcodes. 1 bit can be used to discriminate; leaving 7 bits for zero address opcodes, and 7-4 bits for one address opcodes.
So, the total available opcode space is (2^3 - (6 + 1)) + (2^7 - 30) + (2^(7-4)).
That should be more than enough clarity for you to work out the answer.