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cembeddedmsp432bit-banding

Bit-Band Alias Offset Address for TI MSP432P401 board

Would anyone explain, please, in this formula below for calculating Bit-Band Alias Offset Address for TI MSP432P401R board, why we should add to (addr & 0xF0000000) + BB_OFFSET, this value ((addr & 0xFFFFF) << 5) ?

#define TA0CTL_ADDR (0x40000000)

/* Bit Band Region is offset from Peripheral/SRAM */
#define BB_OFFSET (0x02000000)

/* Macro Function to Read Memory */
#define HWREG32(addr)  (*((volatile uint32_t *)(addr)))

#define BITBAND_ADDR(addr, bit) ( (addr & 0xF0000000) + BB_OFFSET + ((addr & 0xFFFFF) << 5) + (bit << 2) )

If the addr variable in case of MSP432 has the size of the word == uint32_t. It means, that:

  1. (addr & 0xF0000000) + BB_OFFSET = 0x42000000
  2. and then: (bit << 2) = 0x00000002
  3. and the alias will be simply: 0x42000000 + 0x00000002 = 0x42000002 ? So, I come up with my question: why we also need to add ((addr & 0xFFFFF) << 5) to (addr & 0xF0000000) + BB_OFFSET ?

Am I wrong with my calculations ?

Many thanks in advance,

Solution

  • Each bit of the bit-bandable regular address space maps to a 32 bit location in the bit-band region.

    The (addr & 0xFFFFF) part masks lower order address bits to get the 32-bit word offset from the start of the bit-bandable regular address region. The << 5 part multiplies the offset by 32 to obtain the bit-offset of the least-significant bit of addr in the bit-band region.

    For an explanation of how bit-band addresses map to regular addresses see Cortex-M4 Technical Reference Manual - Bit-Banding.