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powerpccpu-cache

How to invalidate L1 data cache for a specific memory range on PowerPC PQ-III e500?


A special memory block would be periodically updated by DMA task. When another Task tried to look up data in this block frequently, there is MCE (Machine Check Exception) about L1 data cache parity check. Can I invalidate the L1 Data Cache for this memory block totally or only after DMA update?

There is an interesting API in libogc like:

void DCInvalidateRange(void *startaddress,u32 len); 

    .globl DCInvalidateRange
DCInvalidateRange:
    cmplwi r4, 0   # zero or negative size?
    blelr
    clrlwi. r5, r3, 27  # check for lower bits set in address
    beq 1f
    addi r4, r4, 0x20 
1:
    addi r4, r4, 0x1f
    srwi r4, r4, 5
    mtctr r4
2:
    dcbi r0, r3
    addi r3, r3, 0x20
    bdnz 2b
    blr

I am not familiar with ASM neither ASM on PowerPC. Would people recommend links or descriptions on this operation?


Solution

  • Here is the best resource, the PowerPC Programming Environments Manual

    Are there specific questions you have about the cache?

    Working with DMA, your choices are snooping or cache flushing. To get this error, you probably have snooping enabled. So the problem is likely that you have data in L1 cache that is uninitialized.

    There's a second resource, the E500 Core Reference Manual, which I couldn't download at the moment but which should give a good description of how to init the cache. I use the E-600 book all the time.