Does FPGA performance (max stable clock speed) reduce after many cycles of programming?
It depends on the technology of your FPGA.
There are 3 technologies available:
Antifuse: Can be programmed only once, so I think you are not talking about them.
Flash: As Every flash, the number or reprogram is finite, but until it stops to work (aka can't write the flash), there is no degradation of speed
SRAM: This one can be "infinitely" re-programed. Now as every electronic component, it will decay with time and overheating, but it is not really related to the reprogrammation