So I have to port code from a STM32F4xx device to a STM32F10x Device. Everything went well and I made huge progress in no time. But then it hit me! At one point in the software there is the following definition
#define BYTE_GPIO (*((__IO uint8_t *)(GPIOE_BASE + 0x0C + 1)))
which obviously defines an access to upper byte of the GPIOE ODR register. While this works fine (as I was told) in the STM32F4x devices as they support byte access to this register, it is not with the stm32F10x devices. This is also stated in the RM:
These bits can be read and written by software and can be accessed in Word mode only.
First I neglected this statement and just went for a try: the code compiles fine without any errors or warnings and even the writes to the upper byte of the GPIOE will be performed well, but soon I discovered that the lower byte of GPIOE is affected by any write to the BYTE_GPIO, too. As this obviously is not usable, I have to find an other solution. But as I dont want to change a lot of application-layer code I'd rather fix this definition some how. Unfortunately I do not see how. So I'm open for idea. Thanks.
If you want to modify the byte you need the sequence of instructions.
inline __attribute__((always_inline)) void SetByte(volatile uint32_t *reg, int byte, uint8_t value)
{
uint32_t regval = *reg;
regval &= ~(0xff << (byte * 8));
regval |= value << (byte * 8);
*reg = regval;
}
and usage
SetByte(&GPIOE -> ODR, 1, val);