I am using a Xavier AGX, and I found the following output on my dmesg while booting up:
[ 0.963531] mc-err: mcerr ops are set to t19x
[ 0.971308] iommu: Adding device 2600000.dma to group 57
[ 0.978632] GPIO line 490 (pcie-reg-enable) hogged as output/high
[ 0.978710] GPIO line 289 (pcie-reg-enable) hogged as output/high
how ever in the device tree (tegra194-p2888-0000-a00.dtsi) it is written as:
gpio@2200000 {
pcie-reg-enable {
gpio-hog;
gpios = <TEGRA194_MAIN_GPIO(Z, 2) GPIO_ACTIVE_HIGH
TEGRA194_MAIN_GPIO(A, 1) GPIO_ACTIVE_LOW>;
label = "pcie-3v3-reg", "pcie-12v-reg";
output-high;
status = "okay";
};
Dtc decode (/boot/dtb/tegra194-p2888-0001-p2822-0000.dtb) give:
pcie-reg-enable {
gpio-hog;
gpios = <0xca 0x0 0x1 0x1>;
label = "pcie-3v3-reg", "pcie-12v-reg";
output-high;
status = "okay";
};
I am very confuse why the output on both are set to HIGH ? is it suppose to be one LOW and one HIGH ? PS: I am not familiar with device tree please help me abit.
The GPIO_ACTIVE_LOW setting means that data values will be logically inverted in software before they are written to hardware, and that raw data values from hardware will be logically inverted before they are returned to the caller. (There are also "raw" variants of the GPIO access functions that bypass this logical inversion.)
The output-high; DTS property means that the GPIO line will be configured as an output with a high signal level.
For the two GPIOs, both will be configured as outputs with a high signal level, but the one with the GPIO_ACTIVE_LOW setting will have the logical value 0 (unless you do a "raw" read), and the one with the GPIO_ACTIVE_HIGH setting will have the logical value 1. If you write (but not a "raw" write) the value 1 to the GPIO with the GPIO_ACTIVE_LOW setting, its output will go to a low signal level.