I'm following the README here to get set up: https://github.com/chipsalliance/rocket-chip. When I run make -j6 run in my $ROCKETCHIP/emulator directory, I get the following error message:
make: *** [output/rv64uf-p-fclass.out] Error 255
make: *** Waiting for unfinished jobs....
make: *** [output/rv64uf-p-fcmp.out] Error 255
make: *** [output/rv64uf-p-move.out] Error 255
make: *** [output/rv64uf-p-ldst.out] Error 255
make: *** [output/rv64uf-p-fcvt.out] Error 255
make: *** [output/rv64uf-p-fcvt_w.out] Error 255
I opened up one of the *.out files and it outputted:
using random seed 1586636887
This emulator compiled with JTAG Remote Bitbang client. To enable, use +jtag_rbb_enable=1.
Listening on port 37902
emulator-freechips.rocketchip.system-freechips.rocketchip.system.DefaultConfig: ../fesvr/dtm.cc:61: uint32_t dtm_t::do_command(dtm_t::req): Assertion `resp_buf.resp == 0' failed.
I updated rocket-tools and rebuilt it but still got the same errors. I'm able to skip to generating synthesizable Verilog in the vsim directory.
I did not dig into this, but it seems that this is a bug recently introduced to the master branch of rocket-chip. Switching to a tagged version (v1.2.4 is the latest stable) can solve this problem.
cd rocket-chip
git checkout v1.2.4
git submodule update --init --recursive
cd emulator
make -jN run