These days I have solved the issue of ocasional false register write. The problem was, that I was writing a lot in the GPIO output register (LPC_GPIO_PORT->SET[1]) in the main loop. In the interrupt routine I was writing in these same registers, and when interrupt happened just in time when these registers were being writen in the main loop, upon return from interrupt, the changes to those registers were discarded and replaced with those writen into register before entering interrupt.
I am using LPC1549 microcontroller. The register writes in interrupts are used for BLDC motor controll, so you could hear loud bang from the motor every 10-30 seconds. By reducing writing registers in the main loop, i have completly eliminated the problem. The question is, is it the same with all registers in microcontroller? I cant find anything describing this problem, which can be a serious issue, and also, hard to find, once it starts causing trouble.
Sounds to be "The Critical Section Problem". This topic pops up a lot more in literature about Operating Systems but exists in any interrupt-driven platform that has shared resources. It might help your searching to look at this problem.
In your case, you have 2 data accessors: the interrupt handler and the main loop. both accessing the same shared resource (memory mapped I/O). This can lead to updates being overwritten immediately based on the timing of the two events like you describe above.
As for your second question, this can affect any shared resources in a concurrent system.