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assemblyx86-64offsetcpu-registersaddressing-mode

what does mean instruction like mov byte ptr [rax + rdx-1], 00 with such offset where rax not pointer


Stuck with study of assembler

mov byte ptr [rax+rdx-01],00

RAX=00000004
RDX=2295EA3B878

and

mov [r10+rsi],al

RAX=0000000000000065
RSI=000002295EA3B878
R10=0000000000000000

It's clear about mov al byte ptr. But i don't understand what means [rax+rdx-01] and [r10+rsi] where rax and r10 not pointer.

In most cases i faced with [RAX+C1] where rax is pointer and C1 is offset but i have no idea what meaning when register store some value, but not a pointer


Solution

  • You might like to read about x86 addressing modes.

    [rax+rdx-01] refers to the address computed by adding rax and rdx and subtracting 1. This is commonly used if one of rax, rdx is a pointer to an array (the "base address"), and the other is an index into that array. So this might be generated by C code such as

    char *array = ...;
    size_t i = ...;
    // ...
    array[i-1] = 0;
    

    where the value of array is stored in rax and i is in rdx, or vice versa. You say here that rax is not a pointer, but perhaps rdx is.

    Likewise, mov [r10+rsi], al could correspond to

    char *array = ...;
    size_t i = ...;
    char c = ...;
    // ...
    array[i] = c;
    

    where r10=array and rsi=i (or vice versa) and al=c.