How to write Thread application in DO file of Model-sim 10.5c using TCL?

Question

I have a FPGA logic, which contains the Logic-A and Logic-B functionalities. I need to create two threads in DO file (TCL) for driving the data to the FPGA Inputs.

Thread 1: FPGA Inputs.

'#sim:/tb_uut/uut/DATA_IN 1F 00'

Thread 2: Provide the inputs to B_IN in Logic B, when A_IN is high, otherwise ignore B_IN.

    '#If { [examine sim:/tb_uut/Logic_B/A_IN]==1} { #sim:/tb_uut/Logic_B/B_IN 1 0 #}'

Here I need to monitor the value of the A_IN until getting high. I am able to drive the B_in during post synthesis simulations by accessing B_IN. I am unable to create two different threads for continuous monitoring of A_IN and driving DATA_IN to FPGA.

How to create the thread in TCL?

Whether threads will be supporting in modelsim 10.5c or not?

How to independently provide the Inputs using DO and VHDL files ?

Answer 1

You can't use TCL threads in ModelSim, it's not supported. This is also not the way to do things in parallel for a VHDL simulation.

Instead, register a TCL callback which executes when the signal you are monitoring changes. You can continue to drive the other signal while monitoring first one. Refer to the "when" command in the ModelSim Command Reference Manual.

I've constructed this example which demonstrates how you can use the "when" command in a ModelSim TCL script.

In the TCL script:

when -label MyLabel {A_IN == '1'} {
  echo "Hello from TCL at $now ns"
}

run -all

The VHDL process:

process
begin

  wait for 10 ns;
  A_IN <= '1';
  wait for 10 ns;
  A_IN <= '0';
  wait for 10 ns;
  A_IN <= '1';
  wait for 10 ns;
  A_IN <= '0';

  report "VHDL simulation finished";
  finish;

end process;

The output to the ModelSim console after we run the TCL script:

VSIM 1> do run.do
# Hello from TCL at 10 ns
# Hello from TCL at 30 ns
# ** Note: VHDL simulation finished
#    Time: 40 ns  Iteration: 0  Instance: /ent