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vhdlfpga

How to switch between datasamples in VHDL?


enter image description hereI have written a code for my I2S interface. this interface has a PISO function (parallel in and serial out). In my testbench, I've added 2 x 24 bits datasamples (left / right channel). Now I would like to switch between this sample and the new second sample (something like: Left1, Right1 , Left2, Right2 , Left1, Right1).

elsif rising_edge(BCLK) then
                PDL_BUF <= PDL1;
                PDR_BUF <= PDR1;
                READY   <= '1';
                VALID   <= '1';

                bitcounter := bitcounter + 1;       

                if bitcounter = 1 then
                    WSP <= '1';
                else 
                    WSP <= '0';

                end if;

                if bitcounter >= 0 and bitcounter <= 23 then  
                    WS <= '0';
                elsif bitcounter > 24 then -- and bitcounter <= 48 
                    WS <= '1';
                    WSP <= '0'; 

                end if;

                if WS = '0' then
                    SD <= PDL_BUF(23);
                    PDL_BUF <= PDL_BUF(22 downto 0) & '0';
                else --if WS = '1' then 
                    SD <= PDR_BUF(23);
                    PDR_BUF <= PDR_BUF(22 downto 0) & '0';

                end if;

                if bitcounter = 48 then
                    bitcounter := 0;                

                end if;
        end if;
    end process;

Solution

  • this is a block that is repeated twice for two channels, it is clear that you can't access the other channel in that.

    you need to add a block let's call it a merging block. in merging block consider both samples as input then you can have both of them in your code.