Cannot receive interrupt on PE0 STM32

Question

I'm trying to receive simple interrupts on my STM32F407G-DISC1, and I can't seem to configure the EXTI0 interrupt channel to receive from PE0, and instead it only seems to trigger on changes to PA0.

When I short the 3.3V pin to PA0, it prints "Interrupt Received", but when I short 3.3V to PE0, nothing happens.

Is there some configuration call I'm missing?

The build scripts and other configuration files are based off of the cortex-m quickstart, with small modifications. If those are relevant I can post those as well.

Here's my code:

# Cargo.toml
[package]
name = "embedded-interrupt"
version = "0.1.0"
edition = "2018"

[dependencies]
cortex-m = "0.6.0"
cortex-m-rt = "0.6.8"
cortex-m-semihosting = "0.3.3"
panic-semihosting = "0.5"
hal = {package = "stm32f4xx-hal", features = ["stm32f407", "rt"], version = "0.5" }

// main.rs
#![no_std]
#![no_main]

extern crate panic_semihosting;

use cortex_m_rt::entry;
use cortex_m::interrupt::{Mutex, free};
use cortex_m_semihosting::hprintln;
use hal::prelude::*;
use hal::stm32::{interrupt, Interrupt, EXTI};
use hal::gpio::{ExtiPin, Edge, gpioe, Input, PullDown};

use core::cell::RefCell;

static PE0: Mutex<RefCell<Option<gpioe::PE0<Input<PullDown>>>>> = Mutex::new(RefCell::new(None));
static EXT_INTER: Mutex<RefCell<Option<EXTI>>> = Mutex::new(RefCell::new(None));

#[entry]
fn start() -> ! {

    let p = hal::stm32::Peripherals::take().unwrap();
    let c = cortex_m::Peripherals::take().unwrap();

    let gpioe = p.GPIOE.split();
    let mut syscfg = p.SYSCFG;
    let mut exti = p.EXTI;
    let mut nvic = c.NVIC;

    nvic.enable(Interrupt::EXTI0);

    let mut pe0 = gpioe.pe0.into_pull_down_input();
    pe0.make_interrupt_source(&mut syscfg);
    pe0.enable_interrupt(&mut exti);
    pe0.trigger_on_edge(&mut exti, Edge::FALLING);

    free(|cs| {
        let cell = PE0.borrow(&cs);
        *cell.borrow_mut() = Some(pe0);

        let cell = EXT_INTER.borrow(&cs);
        *cell.borrow_mut() = Some(exti);
    });

    loop{}
}

#[interrupt]
fn EXTI0() {
    hprintln!("Interrupt received").unwrap();

    // clear the interrupt
    free(|cs| {
        let pe0 = PE0.borrow(&cs);
        let exti = EXT_INTER.borrow(&cs);

        if let (Some(pe0), Some(mut exti)) = (pe0.borrow_mut().as_mut(), exti.borrow_mut().as_mut()) {
            pe0.clear_interrupt_pending_bit(&mut exti);
        }
    });

}

Answer 1

Apparently, the system configuration controller clock must be enabled to change syscfg registers. Adding rcc.apb2enr.modify(|_, w| w.syscfgen().enabled()); makes it work. Full source:

#![no_std]
#![no_main]

extern crate panic_semihosting;

use cortex_m::interrupt::{free, Mutex};
use cortex_m_rt::entry;
use cortex_m_semihosting::hprintln;
use hal::gpio::{gpioe, Edge, ExtiPin, Input, PullDown};
use hal::prelude::*;
use hal::stm32::{interrupt, Interrupt, EXTI};

use core::cell::RefCell;

static PE0: Mutex<RefCell<Option<gpioe::PE0<Input<PullDown>>>>> = Mutex::new(RefCell::new(None));
static EXT_INTER: Mutex<RefCell<Option<EXTI>>> = Mutex::new(RefCell::new(None));

#[entry]
fn start() -> ! {
    let p = hal::stm32::Peripherals::take().unwrap();
    let c = cortex_m::Peripherals::take().unwrap();

    let gpioe = p.GPIOE.split();
    let rcc = p.RCC;
    let mut syscfg = p.SYSCFG;
    let mut exti = p.EXTI;
    let mut nvic = c.NVIC;

    rcc.apb2enr.modify(|_, w| w.syscfgen().enabled()); // important

    nvic.enable(Interrupt::EXTI0);

    let mut pe0 = gpioe.pe0.into_pull_down_input();
    pe0.make_interrupt_source(&mut syscfg);
    pe0.enable_interrupt(&mut exti);
    pe0.trigger_on_edge(&mut exti, Edge::FALLING);

    free(|cs| {
        let cell = PE0.borrow(&cs);
        *cell.borrow_mut() = Some(pe0);

        let cell = EXT_INTER.borrow(&cs);
        *cell.borrow_mut() = Some(exti);
    });

    loop {}
}

#[interrupt]
fn EXTI0() {
    hprintln!("Interrupt received").unwrap();

    // clear the interrupt
    free(|cs| {
        let pe0 = PE0.borrow(&cs);
        let exti = EXT_INTER.borrow(&cs);

        if let (Some(pe0), Some(mut exti)) = (pe0.borrow_mut().as_mut(), exti.borrow_mut().as_mut())
        {
            pe0.clear_interrupt_pending_bit(&mut exti);
        }
    });
}