Have this problem with the arm neon inline assembler:
mov v5.4s, v8.4s
The instruction is compiles using clang, but GCC produces the following error :(if I use mov v5.16b,v8.16b this is fine):
/var/folders/ln/2jr6sq855753h7fjrg_g6hm80000gq/T//ccUbsZid.s: Assembler
messages:
/var/folders/ln/2jr6sq855753h7fjrg_g6hm80000gq/T//ccUbsZid.s:38355:
Error: operand mismatch -- `mov v5.4s,v8.4s'
//ccUbsZid.s:38355:Info:did you mean this?
//ccUbsZid.s:38355:Info:mov v5.8b,v8.8b
//ccUbsZid.s:38355:Info:other valid variant(s):
//ccUbsZid.s:38355:Info:mov v5.16b,v8.16b
I wonder what causes the error in GCC. In my opinion, mov is equal to copy.
It's a simple whole register copy, hence the element type is irrelevant.
The assembly instruction actually only supports 8b and 16b specifying double or quad register, and thus, GCC is correct in this while Clang is more tolerant, albeit misleading to some degree like this case.
Honestly, I don't like the aarch64 assembly syntax.
On aarch32, the data type is specified by the instruction suffix while it is done by the register suffix on aarch64 which you have to attach to ALL operand registers.
This new syntax isn't only annoying, but also causes problems.
A simple vmov q5, q8 would be enough in this case on aarch32 without any hassle.