I am trying to make a gray code counter by simply counting normal code and then convert it to gray code.
I get this error
Line 52: Indexed name is not a std_logic_vector
even if I declared that signal as std_logic_vector.
GrayCount <= count(3) & count(3) xor count(2) & count(2) xor count (1) & count (1) xor count(0);
This is 52. line
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.NUMERIC_STD.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
entity GrayCounter is
Port ( clock : in STD_LOGIC;
ud : in STD_LOGIC;
freq_sel : in STD_LOGIC_VECTOR (1 downto 0);
GrayCount : out std_logic_vector (3 downto 0));
end GrayCounter;
architecture Behavioral of GrayCounter is
signal count : std_logic_vector(3 downto 0);
signal hz : integer range 0 to 100000000;
signal clk : std_logic;
begin
process(clock)
begin
case freq_sel is
when "00" => hz <= 2000000;
when "01" => hz <= 4000000;
when "10" => hz <= 10000000;
when others => hz <= 100000000;
end case;
end process;
process(clock)
variable temp : integer range 0 to 100000000;
begin
if(clock'event and clock = '1') then
temp := temp + 1;
if (temp>(hz/2)) then
clk <= not clk;
temp := 0;
end if;
end if;
end process;
process(clk)
begin
if(clk'event and clk = '1') then
if(ud = '1') then
count <= count + 1;
else
count <= count - 1 ;
end if;
end if;
end process;
GrayCount <= count(3) & count(3) xor count(2) & count(2) xor count (1) & count (1) xor count(0);
end Behavioral;
The operator precedence is not what you probably expected.
You should add brackets:
GrayCount <= count(3) & (count(3) xor count(2)) & (count(2) xor count (1)) & (count (1) xor count(0));