How does the shift register work in binary to bcd conversion

Question

I found this code for a 12 bit binary to bcd conversion but I can't seem to understand the shift register part (just showing the state machine part). I need help in understanding how exactly the '&' works in a shift register and if someone can also produce a different way for the shift register part to look something like the code below as it is easier to understand the flow of data:

    ishiftRegister(7) <= Rxd;

    ishiftRegister(6 downto 0) <= iShiftRegister(7 downto 1);


     -- State Machine
    process(present_state, binary, binary_in, bcd_temp, bcds_reg, shift_counter)
    begin
        next_state <= present_state;
        bcds_next <= bcd_temp;
        binary_next <= binary;
        shift_counter_next <= shift_counter;

        case present_state is

            when st_start =>
               next_state <= st_shift;
               binary_next <= binary_in;
               bcds_next <= (others => '0');
               shift_counter_next <= 0;

            when st_shift =>
                if shift_counter = 12 then
                    next_state <= st_stop;
                else
                    binary_next <= binary(10 downto 0) & 'L';
                    bcds_next <= bcds_reg(18 downto 0) & binary(11);
                    shift_counter_next <= shift_counter + 1;
                end if;

            when st_stop=>
                next_state <= st_start;

        end case;
    end process;

Answer 1

The & is a concatenation operator. Check for example this question for more discussion: Concatenating bits in VHDL

bcds_next <= bcds_reg(18 downto 0) & binary(11);

With bcds_reg(18 downto 0) you take the 19 least significant bits of bcds_reg vector (and drop the most significant bit out). I.e. the register is shifted to the left. The binary(11) is the most significant bit of a 12-bit vector binary. Concatenating a 19-bit vector and a single bit with & creates you a 20-bit vector which you can then assing to the 20-bit vector bcds_next.

For your other question, I think the following would also be possible and an equal operation without the & operator.

bcds_next(19 downto 1) <= bcds_reg(18 downto 0);
bcds_next(0) <= binary(11);