I have trouble finding out what movslq instruction does. Google isn't very helpful and there is no such instruction on this list. Here I have read that
MOVSLQ is move and sign-extend a value from a 32-bit source to a 64-bit destination.
I understand this like this. The instruction moves a value from 32-bit source to 64-bit destination but ensures that signed value of the number in the 64-bit destination is equal to the one from source, that is in case of negative number it fills first 32 bits of destination with ones, otherwise with zeros.
Is my understanding correct? If not, please explain where I am wrong.
EDIT:
This is not a duplicate of this topic: assembly cltq and movslq difference. There is no explanation for my question. And you'd have to read the whole answer for 10 minutes to convince yourself of that.
It's movsxd: https://www.felixcloutier.com/x86/MOVSX:MOVSXD.html.
You could figure this out yourself by assembling it with an AT&T assembler and disassembling with an Intel-syntax disassembler. (e.g. objdumpd -d -Mintel foo.o)
And yes, it does 32->64-bit 2's complement sign extension, extending by copying the sign-bit of the source to all the new upper bits. (i.e. dst[63:32] = src[31], and dst[31:0] = src[31:0].)
Fun fact: it's possible to use it without a REX.W prefix as just a 32-bit copy that's architecturally equivalent to mov, but there's zero advantage to ever doing that. Or even with an operand-size prefix as a 16-bit copy, but again that's totally pointless, use mov.
Related: What does cltq do in assembly? has an equivalence table for AT&T vs. Intel mnemonics for all x86 sign-extension instructions, along with description. ([ER]AX to DX:AX, within-[ER]AX, and movsx/movzx to arbitrary registers.)
assembly cltq and movslq difference has more history on how AMD64 repurposed the ARPL opcode from from 16/32-bit mode to get a 1-byte opcode for movsxd.