I'm am taking a course in operating systems, and we were asked to explain the syntax of a given makefile. However, I'm having trouble understanding the contents:
Obj -m += simple.o
all:
make -C/lib/modules/$(shell uname -r)/build M=$(PWD) modules
clean:
make -C/lib/modules/$(shell uname -r)/build M=$(PWD) clean
The main part I don't understand is the first line. From what I know "Obj" is a variable name "-m" is a flag "+=" is the concatenate operator "simple.o" is the object file. Even though I know the parts I don't know what this line does. I have searched extensively, but I can't find any explanation of "-m" flag. It showed up in only one list explaining that the compiler knows to ignore it, see here https://www.gnu.org/software/make/manual/html_node/Options-Summary.html. Can someone explain what this line means and does?
That is a Linux kbuild makefile for an out-of-kernel-tree module. As @MadScientist has pointed out your first line should read
obj-m += simple.o
In Linux kbuild context this means "compile and link simple.c to the module". The goal all (default goal) will build the module against the kernel version you are currently running on.
NOTE: you'll need to install the kernel development headers in order for the module build to succeed.
EDIT: inside the Linux kernel tree you'll also find the notation obj-y += X which means "compile and link X into the kernel when this kernel config has been enabled".