Start again input signals when rst=' 1'

Question

I'm trying to reset the values of the inputs in a circuit when a reset signal starts.

I'm writing on Vivado by Xilinx in VHLD.

signal Xin : signed(4 downto 0) := (others => '0');

...

   stim_process: process
   begin
        Xin <= to_signed(1030,5); wait for clk_period;
        Xin <= to_signed(1050,5); wait for clk_period;
        Xin <= to_signed(1040,5); wait for clk_period;
        Xin <= to_signed(1080,5); wait for clk_period;
        Xin <= to_signed(1100,5); wait for clk_period;
        Xin <= to_signed(0,5);    wait until Rst= '1';
        Xin <= to_signed(1030,5); wait for clk_period;
        Xin <= to_signed(1050,5); wait for clk_period;
        Xin <= to_signed(1040,5); wait for clk_period;
        Xin <= to_signed(1080,5); wait for clk_period;
        Xin <= to_signed(1100,5); wait for clk_period;
        Xin <= to_signed(0,5);            
        wait;
   end process; 

In this way, by sending a reset signal after ALL the inputs have been assigned, I obtain the desired result.

The problems is :

I can not find a way to reset the sequence of input signals at any time and how many times I want.

Answer 1

Rewrite it to keep information about place in the sequence as state information, like:

process (rst, clk) is
begin
  if rst = '1' then
    State <= 0;
    Xin <= to_signed(1030,5);
  elsif rising_edge(clk) then
    case State is
      when 0      => Xin <= to_signed(1030,5);
      when 1      => Xin <= to_signed(1050,5);
      when 2      => Xin <= to_signed(1040,5);
      when 3      => Xin <= to_signed(1080,5);
      when 4      => Xin <= to_signed(1100,5);
      when others => Xin <= to_signed(0,5);
    end case;
    State <= State + 1;
  end if;
end process;

Reset in rst can thereby take immediate effect, and be repeated.

Minor updates to the above may be required depending on the timing you want, but code along the lines of this should do the job.

Btw. doing to_signed conversion of value 1030 into a 5 bit Xin looks odd, since a value of 1030 required at least 12 bits for signed representation.