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What type is the break instruction on MARS (MIPS Assembly)

I'm writing an article about the evolution of programming languages and wrote a small program in MIPS Assembly that calculates the first 100 prime numbers. On of the (pseudo)instructions of this program is 'rem $t3, $t0, $t2' which is converted to the following four native instructions:

bne $10, $0, 0x00000001
break
div $8, $10
mfhi$11

I've never noticed that break instruction before, so I've searched all over the place and could barely find any mention of the break instruction or it's type.

The only two documents I could find where this one that states 'break' as an instruction used by the debugger and this other one that states 'break' as an instruction with three parts: special (6 bits), code (20 bits) and break (6 bits) but it makes no reference to what type this instruction is. It certainly isn't of type R, I or J.

So I was wondering:

  1. Is the break instruction part of the MIPS ISA or an instruction only MARS recognises?
  2. What is the instruction type of the break instruction?
  3. How does it transfer the control to an exception handler, in hardware?
  4. Does it change the Program Counter (PC) register?
Solution

  • According to MIPS32™ Architecture For Programmers Volume I: Introduction to the MIPS32™ Architecture, only the R-Type format has a function field. BREAK has a function field, thus it is an R-Type instruction.

    Since the BREAK instruction takes no operands, it doesn't make use of bits 6..25 for that purpose. This isn't all that unusual; for example, SLL doesn't make use of the rs field so those bits are set to zero, and MULT doesn't make use of either the rd or sa fields so all those bits are set to zero.

    As for what happens: the relevant bits in CP0 register 13 (Cause) would be set to indicate that an exception occurred as the result of hitting a breakpoint. Control would then be transferred to the exception handler code at some fixed address.