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terminologyipcsemaphoreinterprocess

What is a Hardware Semaphore?


How can it be used from software if it is a hardware semaphore? Is it that there is a software API which is actually implemented in HW?

I ask as I am implementing firmware to interface to some hardware. There is going to be a lot of information exchange between the hardware and the firmware. I overhead talk of hardware semaphore and just wanted to find out more information on it. Some literature on this would be helpful


Solution

  • You are mostly correct. There is a SW API that requires some special hardware to work correctly. Implementations of semaphores in software, of which there are a few, are all based on some sort of HW instruction that is guaranteed to be atomic.

    Atomicity in HW is required to implement a semaphore. Normally HW instructions are not atomic.

    To elaborate somewhat, you need to implement a semaphore by reading and writing a piece of shared memory which is visible to more than 1 processor. Reading and writing that shared piece of memory is not an atomic operation in general: for example if you do a read followed by a write there could be other instructions that are scheduled between the read and write.