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memoryoperating-systemtlb

Purpose of address-spaced identifiers(ASIDs)

I am currently studying Operating Systems by A Silberschatz, P Galvin, G Gagne.

I am studying memory management strategies, and on section where they introduce Translation Look-aside Buffer (TLB).

Some TLBs store address-space identifiers (ASIDs) in each TLB entry. An ASID uniquely identifies each process and is used to provide address-space protection for that process. When the TLB attempts to resolve virtual page numbers, it ensures that the ASID for the currently running process matches the ASID associated with the virtual page. If the ASIDs do not match, the attempt is treated as a TLB miss.

Above is a quote from the textbook explaining ASID.

I am a bit confused as TLB miss means the logical address weren't able to be matched in TLB, so it has to be checked with Page table to head towards the physical memory.

That being said, ASID is an extra bits for each entry in TLB to check if the process that is accessing that entry belongs to the process.

What I am wondering is, when ASID is used to refuse the process, shouldn't it trap, instead of TLB miss? TLB miss will forward the process to page table, where the logical address for the process will be able to be mapped to certain address in main memory.

Please help me where I am understanding incorrectly.

Thanks!

Solution

  • Let's say you have two processes running on a system. Process A has its 2nd page mapped to the 100th page frame and Process B has its 2nd page mapped to the 200th page frame.

    So now the MMU needs to find page #2, but does not want to read the page tables again. Does it go to page frame 100 or page frame 200?

    There are at least two ways of handling that problem. One is to flush the cache whenever there is a process switch.

    The other is to assign some unique identifier for each process and include that in the TLB cache entries.

    I am a bit confused as TLB miss means the logical address weren't able to be matched in TLB, so it has to be checked with Page table to head towards the physical memory.

    To translate logical page #X to a physical page frame:

    1. Look in the TLB for #X. If it's not there, go to the page table.
    2. [#X exists] Is there an entry for #X with an ASID that matches the current process? If not, go to the page table.
    3. Use the page mapping in the TLB.

    What I am wondering is, when ASID is used to refuse the process, shouldn't it trap, instead of TLB miss?

    Then you'd get traps the first time the process accessed a page and the program would crash.