I have a Zynq 7000 target hardware. I consists of a dual core ARM Cortex A-9 with NEON and VFP co-processor. The co-processor must be enabled with an write access to the FPEXC register.
The Enabling NEON and FPU for bare-metal shows corresponding code. The problem is that GCC (GNU assembler) doesn't accept the code. The error is:
Error: selected processor does not support requested special purpose register -- `msr fpexc,r0'
The complete minimal source code example is here:
.text
.global enableNeon
enableNeon:
mrc p15,0,r0,c1,c0,2 // Read CP Access register
orr r0,#0x00f00000 // Enable full access to NEON/VFP (Coprocessors 10 and 11)
mcr p15,0,r0,c1,c0,2 // Write CP Access register
isb
mov r0,#0x40000000 // Switch on the VFP and NEON hardware
msr fpexc,r0 // Set EN bit in FPEXC
bx lr
.end
The GCC compiler of the Xilinx-SDK is started with these options:
arm-none-eabi-gcc -c -o "monitor.o" -mcpu=cortex-a9 -mfpu=neon-vfpv4 monitor.s
It looks like the GCC did not recognize that the CPU has the FPEXC register. How can I configure the GCC to enable code generation for that CPU, coprocessor, and the special purpose register FPXEC?
The GNU assembler wants to see a VMSR instruction for this register:
vmsr fpexc,r0 // Set EN bit in FPEXC